1. Field of the Invention
The present invention relates to digital communications. More particularly, it relates to techniques and apparatus for increasing the reliability of recovered timing and frame boundaries and for simultaneously increasing bandwidth of a transmitted time division multiple access (TDMA) signal.
2. Background of Related Art
Digital communications take many forms and utilize many protocols. A very popular form of digital communications is called time division multiple access (TDMA).
TDMA, while being equally applicable to wired communications, is also a technology commonly used for delivering digital wireless service using time division multiplexing (TDM).
In a typical wireless application, TDMA works by dividing a radio frequency into time slots and then allocating the various time slots to multiple communication fields. In this way, a single frequency can support multiple, simultaneous data fields. TDMA is used, e.g., by GSM digital cellular systems.
FIG. 4 shows a plurality of transmitter devices communicating with a receiver device using TDMA frames.
In particular, as shown in FIG. 4, a plurality of TDMA transmitter devices 410–420 may utilize separate time slots of a TDMA communication field to communicate with a TDMA receiver device 400. While shown as a unidirectional field in FIG. 4, any or all TDMA devices 400–420 may be transceivers.
The TDMA devices 400, 410, 420 all include their own independent master clock 402, 412, 422, respectively, at opposite ends of the communication field. While locally wired TDMA systems typically allow the use of a common master clock routed to each TDMA device, wireless or remote TDMA devices are not afforded the same luxury, and thus require coordination of the timing as between communicating devices. For instance, it is a common practice to recover a data clocking signal from a received TDMA signal so as to allow appropriate detection of the data in the frame.
FIG. 5A shows multiple data frames within a single TDMA burst, and FIG. 5B shows a single data frame in more detail.
In particular, as shown in FIG. 5A, a TDMA burst between TDMA transmitters 410 and the TDMA receiver 400 typically includes a plurality of data frames 502–506. The length of each data frame and the number of data frames in a TDMA burst each depend upon the particular application.
FIG. 5B shows that the data frame 502 includes a plurality of fields 510–514. Anywhere between many fields and only one field may be implemented within a TDMA data frame, depending upon the particular application.
As shown in FIG. 5B, TDMA communications typically use a frame structure which includes a “sync word” 520 at the beginning of each frame 502, 504, 506. The TDMA receiver 400 recognizes and uses the sync word 520 to determine the “start of frame” for each data frame 502–506, so as to not lose any data bits from the communication.
FIG. 6 shows a conventional technique for clocking a received TDMA signal with a local master clock.
In particular, as shown in FIG. 6, the receiver front end 600 typically includes a receiver (e.g., an RF receiver) 604 operated by a master local clock 608. The received data is clocked by a data clock signal generated by the master clock 608, and the received data is monitored by a start of frame detector 620 to determine the positioning of the start bit or symbol of each new frame in a TDMA burst.
In such a conventional system, the master clock 608 must be reset or otherwise synchronized with the start of a new data frame to ensure proper clocking of received data bits and adequate tolerance allowed for jitter, etc. Furthermore, because master transmit and receive clocks typically will drift with respect to one another, the position of the first bit in the TDMA frame will occasionally move relative to the receive master clock. Thus, a sync word is conventionally used to locate the start of each data frame in a TDMA burst to ensure proper clocking of the received data clock. While the sync word provides a suitable marking for the beginning of each frame in a TDMA burst, it also requires a number of bits or symbols, and takes up valuable bandwidth. Bandwidth is a valuable commodity, and is preferably conserved whenever possible, particularly in wireless applications.
FIG. 7 shows the preferred positioning of an active edge of the recovered data clock (waveform (b)) with respect to the positioning of the recovered data (waveform(a)). Ideally, the active edge (e.g., the negative edge of the clock signal shown in FIG. 7) is centered on a respective bit or symbol of the received data stream in order to maximize the probability of correctly detecting received data.
As can be seen in FIG. 7, if the active edge (e.g., the negative edge) of the clock signal drifts too closely to the edges of the respective data bits, jitter or other anomalies may cause a data error, increasing the bit error rate.